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Wei-Lun Wang, Kuen-Jong Lee. Accelerated test pattern generators for mixed-mode BIST environments. In 9th Asian Test Symposium (ATS 2000), 4-6 December 2000, Taipei, Taiwan. pages 368-373, IEEE Computer Society, 2000. [doi]
Possibly Related PublicationsThe following publications are possibly variants of this publication: An Efficient Deterministic Test Pattern Generator for Scan-Based BIST EnvironmentWei-Lun Wang, Kuen-Jong Lee. et, 18(1):43-53, 2002. [doi] A Low Power Test Pattern Generator for BISTShaoChong Lei, Feng Liang, Zeye Liu, Xiaoying Wang, Zhen Wang. ieicet, 93-C(5):696-702, 2010. [doi]
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