An All-Weights-on-Chip DNN Accelerator in 22nm ULL Featuring 24×1 Mb eRRAM

Zhehong Wang, Ziyun Li, Li Xu, Qing Dong 0001, Chin-I Su, Wen-Ting Chu, George Tsou, Yu-Der Chih, Tsung-Yung Jonathan Chang, Dennis Sylvester, Hun-Seok Kim, David T. Blaauw. An All-Weights-on-Chip DNN Accelerator in 22nm ULL Featuring 24×1 Mb eRRAM. In IEEE Symposium on VLSI Circuits, VLSI Circuits 2020, Honolulu, HI, USA, June 16-19, 2020. pages 1-2, IEEE, 2020. [doi]

Authors

Zhehong Wang

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Ziyun Li

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Li Xu

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Qing Dong 0001

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Chin-I Su

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Wen-Ting Chu

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George Tsou

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Yu-Der Chih

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Tsung-Yung Jonathan Chang

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Dennis Sylvester

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Hun-Seok Kim

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David T. Blaauw

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