Latency sensitivity-based cache partitioning for heterogeneous multi-core architecture - researchr publication authors

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Po-Han Wang, Cheng-Hsuan Li, Chia-Lin Yang. Latency sensitivity-based cache partitioning for heterogeneous multi-core architecture. In Proceedings of the 53rd Annual Design Automation Conference, DAC 2016, Austin, TX, USA, June 5-9, 2016. pages 5, ACM, 2016. [doi]

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