Abstract is missing.
- Invited - Airtouch: a novel single layer 3D touch sensing system for human/mobile devices interactionsLi Du, Chun-Chen Liu, Adrian Tang 0002, Yan Zhang, Yilei Li, Kye Cheung, Mau-Chung Frank Chang. 1 [doi]
- Invited - A 2.2 GHz SRAM with high temperature variation immunity for deep learning application under 28nmChun-Chen Liu, Yen-Hsiang Wang, Yilei Li, Chien-Heng Wong, Tien Pei Chou, Young-Kai Chen, M.-C. Frank Chang. 2 [doi]
- Invited - Wireless sensor nodes for environmental monitoring in internet of thingsTing-Chou Lu, Li-Ren Huang, Yu Lee, Kun-Ju Tsai, Yu-Te Liao, Nai-Chen Daniel Cheng, Yuan-Hua Chu, Yi-Hsing Tsai, Fang-Chu Chen, Tzi-cker Chiueh. 3 [doi]
- Accurate phase-level cross-platform power and performance estimationXinnian Zheng, Lizy K. John, Andreas Gerstlauer. 4 [doi]
- Latency sensitivity-based cache partitioning for heterogeneous multi-core architecturePo-Han Wang, Cheng-Hsuan Li, Chia-Lin Yang. 5 [doi]
- Single-tier virtual queuing: an efficacious memory controller architecture for MPSoCs with multiple realtime coresYang Song, Kambiz Samadi, Bill Lin. 6 [doi]
- Debugging and verifying SoC designs through effective cross-layer hardware-software co-simulationKeith A. Campbell, Leon He, Liwei Yang, Swathi T. Gurumani, Kyle Rupnow, Deming Chen. 7 [doi]
- Efficient performance modeling via Dual-Prior Bayesian Model Fusion for analog and mixed-signal circuitsQicheng Huang, Chenlei Fang, Fan Yang, Xuan Zeng, Dian Zhou, Xin Li. 8 [doi]
- Correlated Bayesian Model Fusion: efficient performance modeling of large-scale tunable analog/RF integrated circuitsFa Wang, Xin Li. 9 [doi]
- Efficient performance modeling of analog integrated circuits via kernel density based sparse regressionChenlei Fang, Qicheng Huang, Fan Yang, Xuan Zeng, Dian Zhou, Xin Li. 10 [doi]
- Relevance vector and feature machine for statistical analog circuit characterization and built-in self-test optimizationHonghuang Lin, Peng Li. 11 [doi]
- Reliability-aware design to suppress agingHussam Amrouch, Behnam Khaleghi, Andreas Gerstlauerz, Jörg Henkel. 12 [doi]
- Statistical fault injection for impact-evaluation of timing errors on application performanceJeremy Constantin, Andreas Peter Burg, Zheng Wang, Anupam Chattopadhyay, Georgios Karakonstantis. 13 [doi]
- Serial T0: approximate bus encoding for energy-efficient transmission of sensor signalsDaniele Jahier Pagliari, Enrico Macii, Massimo Poncino. 14 [doi]
- Designing approximate circuits using clock overgatingYounghoon Kim, Swagath Venkataramani, Kaushik Roy, Anand Raghunathan. 15 [doi]
- Invited - Heterogeneous datacenters: options and opportunitiesJason Cong, Muhuan Huang, Di Wu, Cody Hao Yu. 16 [doi]
- Invited - The case for embedded scalable platformsLuca P. Carloni. 17 [doi]
- A new learning method for inference accuracy, core occupation, and performance co-optimization on TrueNorth chipWei Wen, Chunpeng Wu, Yandan Wang, Kent W. Nixon, Qing Wu, Mark Barnell, Hai Li, Yiran Chen. 18 [doi]
- Dot-product engine for neuromorphic computing: programming 1T1M crossbar to accelerate matrix-vector multiplicationMiao Hu, John Paul Strachan, Zhiyong Li, Emmanuelle M. Grafals, Noraica Davila, Catherine Graves, Sity Lam, Ning Ge, Jianhua Joshua Yang, R. Stanley Williams. 19 [doi]
- Perform-ML: performance optimized machine learning by platform and content aware customizationAzalia Mirhoseini, Bita Darvish Rouhani, Ebrahim M. Songhori, Farinaz Koushanfar. 20 [doi]
- Low-power approximate convolution computing unit with domain-wall motion based "spin-memristor" for image processing applicationsYong Shim, Abhronil Sengupta, Kaushik Roy. 21 [doi]
- A framework for verification of SystemC TLM programs with model slicing: a case studyReza Hajisheykhi, Mohammad Roohitavaf, Ali Ebnenasir, Sandeep S. Kulkarni. 22 [doi]
- Design partitioning for large-scale equivalence checking and functional correctionGrace Wu, Yi-Tin Sun, Jie-Hong R. Jiang. 23 [doi]
- Probabilistic bug-masking analysis for post-silicon tests in microprocessor verificationDoowon Lee, Tom Kolan, Arkadiy Morgenshtein, Vitali Sokhin, Ronny Morad, Avi Ziv, Valeria Bertacco. 24 [doi]
- Fault injection acceleration by simultaneous injection of non-interacting faultsMojtaba Ebrahimi, Mohammad Hadi Moshrefpour, Mohammad Saber Golanbari, Mehdi Baradaran Tahoori. 25 [doi]
- Privacy preserving localization for smart automotive systemsSiam U. Hussain, Farinaz Koushanfar. 26 [doi]
- Integration of multi-sensor occupancy grids into automotive ECUsTiana A. Rakotovao, Julien Mottin, Diego Puschini, Christian Laugier. 27 [doi]
- Formal reliability analysis of switched ethernet automotive networks under transient transmission errorsFedor Smirnov, Michael Glaß, Felix Reimann, Jürgen Teich. 28 [doi]
- Random modulo: a new processor cache design for real-time critical systemsCarles Hernández, Jaume Abella, Andrea Gianarro, Jan Andersson, Francisco J. Cazorla. 29 [doi]
- Invited - Cross-layer modeling and optimization for electromigration induced reliabilityTaeyoung Kim, Zeyu Sun, Chase Cook, Hengyang Zhao, Ruiwen Li, Daniel Wong, Sheldon X.-D. Tan. 30 [doi]
- Invited - Optimizing device reliability effects at the intersection of physics, circuits, and architectureDeepashree Sengupta, Vivek Mishra, Sachin S. Sapatnekar. 31 [doi]
- Invited - Cross-layer approaches for soft error modeling and mitigationMojtaba Ebrahimi, Mehdi Baradaran Tahoori. 32 [doi]
- Invited - Energy harvesting and transient computing: a paradigm shift for embedded systems?Geoff V. Merrett. 33 [doi]
- A low-cost conflict-free NoC for GPGPUsXia Zhao, Sheng Ma, Yuxi Liu, Lieven Eeckhout, Zhiying Wang. 34 [doi]
- Notifying memories: a case-study on data-flow applications with NoC interfaces implementationKevin J. M. Martin, Mostafa Rizk, Martha Johanna Sepúlveda, Jean-Philippe Diguet. 35 [doi]
- Quest for high-performance bufferless NoCs with single-cycle express paths and self-learning throttlingBhavya K. Daya, Li-Shiuan Peh, Anantha P. Chandrakasan. 36 [doi]
- DISCO: a low overhead in-network data compressor for energy-efficient chip multi-processorsYing Wang, Yinhe Han, Jun Zhou, Huawei Li, Xiaowei Li. 37 [doi]
- Achieving lightweight multicast in asynchronous networks-on-chip using local speculationKshitij Bhardwaj, Steven M. Nowick. 38 [doi]
- PICO: mitigating heterodyne crosstalk due to process variations and intermodulation effects in photonic NoCsSai Vineel Reddy Chittamuru, Ishan G. Thakkar, Sudeep Pasricha. 39 [doi]
- Multiple patterning layout decomposition considering complex coloring rulesHua-Yu Chang, Iris Hui-Ru Jiang. 40 [doi]
- Redundant via insertion for multiple-patterning directed-self-assembly lithographySeongbo Shim, Woohyun Chung, Youngsoo Shin. 41 [doi]
- Self-aligned double patterning-aware detailed routing with double via insertion and via manufacturability considerationYixiao Ding, Chris C. N. Chu, Wai-Kei Mak. 42 [doi]
- Predicting electromigration mortality under temperature and product lifetime specificationsVivek Mishra, Sachin S. Sapatnekar. 43 [doi]
- A Monte Carlo simulation flow for SEU analysis of sequential circuitsMeng Li, Ye Wang, Michael Orshansky. 44 [doi]
- Physics-based full-chip TDDB assessment for BEOL interconnectsXin Huang, Valeriy Sukharev, Zhongdong Qi, Taeyoung Kim, Sheldon X.-D. Tan. 45 [doi]
- ageOpt-RMT: compiler-driven variation-aware aging optimization for redundant multithreadingFlorian Kriebel, Semeen Rehman, Muhammad Shafique, Jörg Henkel. 46 [doi]
- Improving mobile gaming performance through cooperative CPU-GPU thermal managementAlok Prakash, Hussam Amrouch, Muhammad Shafique, Tulika Mitra, Jörg Henkel. 47 [doi]
- nZDC: a compiler technique for near zero silent data corruptionMoslem Didehban, Aviral Shrivastava. 48 [doi]
- Automatic parallelization and accelerator offloading for embedded applications on heterogeneous MPSoCsMiguel Angel Aguilar, Rainer Leupers, Gerd Ascheid, Luis Gabriel Murillo. 49 [doi]
- Similarity-based wakeup management for mobile systems in connected standbyChun-Hao Kao, Sheng-Wei Cheng, Pi-Cheng Hsiu. 50 [doi]
- Synergistic timing speculation for multi-threaded programsAtif Yasin, Jeff Jun Zhang, Hu Chen, Siddharth Garg, Sanghamitra Roy, Koushik Chakraborty. 51 [doi]
- Invited - Cooperation or competition?: coexistence of safety and security in next-generation ethernet-based automotive networksChung-Wei Lin, Huafeng Yu. 52 [doi]
- Invited - Towards fail-operational ethernet based in-vehicle networksMischa Möstl, Daniel Thiele, Rolf Ernst. 53 [doi]
- Distributed on-chip regulation: theoretical stability foundation, over-design reduction and performance optimizationXin Zhan, Peng Li, Edgar Sánchez-Sinencio. 54 [doi]
- Accelerating soft-error-rate (SER) estimation in the presence of single event transientsJi Li, Jeffrey Draper. 55 [doi]
- A fast simulator for the analysis of sub-threshold thermal noise transientsMarco Donato, R. Iris Bahar, William R. Patterson, Alexander Zaslavsky. 56 [doi]
- Spectral graph sparsification in nearly-linear time leveraging efficient spectral perturbation analysisZhuo Feng. 57 [doi]
- Efficient probing schemes for fine-pitch pads of InFO wafer-level chip-scale packageYu-Chieh Huang, Bing-Yang Lin, Cheng-Wen Wu, Mincent Lee, Hao Chen, Hung-Chih Lin, Ching-Nen Peng, Min-Jer Wang. 58 [doi]
- Reducing control bit overhead for X-masking/X-canceling hybrid architecture via pattern partitioningJin-Hyun Kang, Nur A. Touba, Joon-Sung Yang. 59 [doi]
- EffiTest: efficient delay test and statistical prediction for configuring post-silicon tunable buffersGrace Li Zhang, Bing Li, Ulf Schlichtmann. 60 [doi]
- Comprehensive optimization of scan chain timing during late-stage IC implementationKun Young Chung, Andrew B. Kahng, Jiajia Li. 61 [doi]
- Reducing serial I/O power in error-tolerant applications by efficient lossy encodingPhillip Stanley-Marbell, Martin C. Rinard. 62 [doi]
- Improving performance and lifetime of NAND storage systems using relaxed program sequenceJisung Park, JaeYong Jeong, Sungjin Lee, Youngsun Song, Jihong Kim. 63 [doi]
- Data cache prefetching via context directed pattern matching for coarse-grained reconfigurable arraysChen Yang, Leibo Liu, Shouyi Yin, Shaojun Wei. 64 [doi]
- TEMP: thread batch enabled memory partitioning for GPUMengjie Mao, Wujie Wen, Xiaoxiao Liu, Jingtong Hu, Danghui Wang, Yiran Chen, Hai Li. 65 [doi]
- Invited - Specification and modeling for systems-on-chip security verificationSharad Malik, Pramod Subramanyan. 66 [doi]
- Invited - Context-aware energy-efficient communication for IoT sensor nodesShreyas Sen. 67 [doi]
- Clear: <u>c</u>ross-<u>l</u>ayer <u>e</u>xploration for <u>a</u>rchitecting <u>r</u>esilience combining hardware and software techniques to tolerate soft errors in processor coresEric Cheng, Shahrzad Mirkhani, Lukasz G. Szafaryn, Chen-Yong Cher, Hyungmin Cho, Kevin Skadron, Mircea R. Stan, Klas Lilja, Jacob A. Abraham, Pradip Bose, Subhasish Mitra. 68 [doi]
- Designing guardbands for instantaneous aging effectsVictor M. van Santen, Hussam Amrouch, Javier Martín-Martínez, Montserrat Nafría, Jörg Henkel. 69 [doi]
- s: an improved NVSim for variation aware STT-RAM simulationEnes Eken, Linghao Song, Ismail Bayram, Cong Xu, Wujie Wen, Yuan Xie 0001, Yiran Chen. 70 [doi]
- A novel cross-layer framework for early-stage power delivery and architecture co-explorationCheng Zhuo, Kassan Unda, Yiyu Shi, Wei-Kai Shih. 71 [doi]
- A high-resolution side-channel attack on last-level cacheMehmet Kayaalp, Nael B. Abu-Ghazaleh, Dmitry V. Ponomarev, Aamer Jaleel. 72 [doi]
- GarbledCPU: a MIPS processor for secure computation in hardwareEbrahim M. Songhori, Shaza Zeitouni, Ghada Dessouky, Thomas Schneider 0003, Ahmad-Reza Sadeghi, Farinaz Koushanfar. 73 [doi]
- SecDCP: secure dynamic cache partitioning for efficient timing channel protectionYao Wang, Andrew Ferraiuolo, Danfeng Zhang, Andrew C. Myers, G. Edward Suh. 74 [doi]
- Physical unclonable functions-based linear encryption against code reuse attacksPengfei Qiu, Yongqiang Lyu, Jiliang Zhang, Xingwei Wang, Di Zhai, Dongsheng Wang, Gang Qu. 75 [doi]
- Near-threshold computing in FinFET technologies: opportunities for improved voltage scalabilityNathaniel Ross Pinckney, Lucian Shifren, Brian Cline, Saurabh Sinha, Supreet Jeloka, Ronald G. Dreslinski, Trevor N. Mudge, Dennis Sylvester, David Blaauw. 76 [doi]
- Match-making for monolithic 3D IC: finding the right technology nodeKyungwook Chang, Saurabh Sinha, Brian Cline, Greg Yeric, Sung Kyu Lim. 77 [doi]
- Lower power by voltage stacking: a fine-grained system design approachKristof Blutman, Ajay Kapoor, Jacinto Garcia Martinez, Hamed Fatemi, José Pineda de Gyvez. 78 [doi]
- Leveraging FDSOI through body bias domain partitioning and bias searchJohannes Maximilian Kühn, Hideharu Amano, Oliver Bringmann, Wolfgang Rosenstiel. 79 [doi]
- QB-trees: towards an optimal topological representation and its applications to analog layout designsI.-Peng Wu, Hung-Chih Ou, Yao-Wen Chang. 80 [doi]
- Timing-driven cell placement optimization for early slack histogram compressionChau-Chin Huang, Yen-Chun Liu, Yu-Sheng Lu, Yun-Chih Kuo, Yao-Wen Chang, Sy-Yen Kuo. 81 [doi]
- Flip-flop clustering by weighted K-means algorithmGang Wu, Yue Xu, Dean Wu, Manoj Ragupathy, Yu-Yen Mo, Chris C. N. Chu. 82 [doi]
- Legalization algorithm for multiple-row height standard cell designWing-Kai Chow, Chak-Wa Pui, Evangeline F. Y. Young. 83 [doi]
- Minimum-implant-area-aware detailed placement with spacing constraintsKai-Han Tseng, Yao-Wen Chang, Charles C. C. Liu. 84 [doi]
- Incremental layer assignment for critical path timingDerong Liu, Bei Yu, Salim Chowdhury, David Z. Pan. 85 [doi]
- Catching the flu: emerging threats from a third party power management unitRajesh Jayashankara Shridevi, Chidhambaranathan Rajamanikkam, Koushik Chakraborty, Sanghamitra Roy. 86 [doi]
- Information dispersion for trojan defense through high-level synthesisS. T. Choden Konigsmark, Deming Chen, Martin D. F. Wong. 87 [doi]
- Hybrid STT-CMOS designs for reverse-engineering preventionTheodore Winograd, Hassan Salmani, Hamid Mahmoodi, Kris Gaj, Houman Homayoun. 88 [doi]
- AVFSM: a framework for identifying and mitigating vulnerabilities in FSMsAdib Nahiyan, Kan Xiao, Kun Yang, Yier Jin, Domenic Forte, Mark Tehranipoor. 89 [doi]
- PLL to the rescue: a novel EM fault countermeasureNoriyuki Miura, Zakaria Najm, Wei He, Shivam Bhasin, Xuan Thuy Ngo, Makoto Nagata, Jean-Luc Danger. 90 [doi]
- Remote attestation for low-end embedded devices: the prover's perspectiveFranz Ferdinand Brasser, Kasper Bonne Rasmussen, Ahmad-Reza Sadeghi, Gene Tsudik. 91 [doi]
- Enabling sub-blocks erase management to boost the performance of 3D NAND flash memoryTseng-Yi Chen, Yuan-Hao Chang, Chien-Chung Ho, Shuo-Han Chen. 92 [doi]
- BLESS: a simple and efficient scheme for prolonging PCM lifetimeMarjan Asadinia, Majid Jalili 0001, Hamid Sarbazi-Azad. 93 [doi]
- A model-driven approach to warp/thread-block level GPU cache bypassingHongwen Dai, Chao Li, Huiyang Zhou, Saurabh Gupta, Christos Kartsaklis, Mike Mantor. 94 [doi]
- A real-time energy-efficient superpixel hardware accelerator for mobile computer vision applicationsInjoon Hong, Jason Clemons, Rangharajan Venkatesan, Iuri Frosio, Brucek Khailany, Stephen W. Keckler. 95 [doi]
- An area-efficient consolidated configurable error correction for approximate hardware acceleratorsSana Mazahir, Osman Hasan, Rehan Hafiz, Muhammad Shafique, Jörg Henkel. 96 [doi]
- Approximate bitcoin miningMatthew Vilim, Henry Duwe, Rakesh Kumar 0002. 97 [doi]
- Invited - Cross-layer approximations for neuromorphic computing: from devices to circuits and systemsPriyadarshini Panda, Abhronil Sengupta, Syed Shakib Sarwar, Gopalakrishnan Srinivasan, Swagath Venkataramani, Anand Raghunathan, Kaushik Roy. 98 [doi]
- Invited - Cross-layer approximate computing: from logic to architecturesMuhammad Shafique, Rehan Hafiz, Semeen Rehman, Walaa El-Harouni, Jörg Henkel. 99 [doi]
- Invited - Approximate computing with partially unreliable dynamic random access memory - approximate DRAMMatthias Jung 0001, Deepak M. Mathew, Christian Weis, Norbert Wehn. 100 [doi]
- Novel CMOS RFIC layout generation with concurrent device placement and fixed-length microstrip routingTsun-Ming Tseng, Bing Li, Ching-feng Yeh, Hsiang-Chieh Jhan, Zuo-Min Tsai, Mark Po-Hung Lin, Ulf Schlichtmann. 101 [doi]
- Procedural capacitor placement in differential charge-scaling converters by nonlinearity analysisFlorin Burcea, Husni M. Habal, Helmut E. Graeb. 102 [doi]
- A novel time and voltage based SAR ADC design with self-learning techniqueAbhilash Karnatakam Nagabhushana, Haibo Wang. 103 [doi]
- Extended statistical element selection: a calibration method for high resolution in analog/RF designsRenzhi Liu, Jeffrey A. Weldon, Larry T. Pileggi. 104 [doi]
- A low-power dynamic divider for approximate applicationsSoheil Hashemi, R. Iris Bahar, Sherief Reda. 105 [doi]
- Optimal design of JPEG hardware under the approximate computing paradigmFarhana Sharmin Snigdha, Deepashree Sengupta, Jiang Hu, Sachin S. Sapatnekar. 106 [doi]
- Minimizing the energy-delay product of SRAM arrays using a device-circuit-architecture co-optimization frameworkAlireza Shafaei, Hassan Afzali-Kusha, Massoud Pedram. 107 [doi]
- Energy efficient computation with asynchronous racesAdvait Madhavan, Timothy Sherwood, Dmitri B. Strukov. 108 [doi]
- A quantitative analysis on microarchitectures of modern CPU-FPGA platformsYoung Kyu Choi, Jason Cong, Zhenman Fang, Yuchen Hao, Glenn Reinman, Peng Wei. 109 [doi]
- DeepBurning: automatic generation of FPGA-based learning accelerators for the neural network familyYing Wang, Jie Xu, Yinhe Han, Huawei Li, Xiaowei Li. 110 [doi]
- Resource budgeting for reliability in reconfigurable architecturesHongyan Zhang, Lars Bauer, Jörg Henkel. 111 [doi]
- An MPSoC for energy-efficient database query processingSebastian Haas, Oliver Arnold, Benedikt Nöthen, Stefan Scholze, Georg Ellguth, Andreas Dixius, Sebastian Höppner, Stefan Schiefer, Stephan Hartmann, Stephan Henker, Thomas Hocker, Jörg Schreiter, Holger Eisenreich, Jens-Uwe Schlüßler, Dennis Walter, Tobias Seifert, Friedrich Pauls, Mattis Hasler, Yong Chen, Hermann Hensel, Sadia Moriam, Emil Matús, Christian Mayr, René Schüffny, Gerhard P. Fettweis. 112 [doi]
- Practical statistical static timing analysis with current source modelsDebjit Sinha, Vladimir Zolotov, Sheshashayee K. Raghunathan, Michael H. Wood, Kerim Kalafala. 113 [doi]
- Statistical path tracing in timing graphsVasant Rao, Debjit Sinha, Nitin Srimal, Prabhat K. Maurya. 114 [doi]
- Efficient transistor-level timing yield estimation via line samplingHiromitsu Awano, Takashi Sato. 115 [doi]
- A distributed timing analysis framework for large designsTsung-Wei Huang, Martin D. F. Wong, Debjit Sinha, Kerim Kalafala, Natesan Venkateswaran. 116 [doi]
- An MIG-based compiler for programmable logic-in-memory architecturesMathias Soeken, Saeideh Shirinzadeh, Pierre-Emmanuel Gaillardon, Luca Gaetano Amarù, Rolf Drechsler, Giovanni De Micheli. 117 [doi]
- Nonvolatile memory design based on ferroelectric FETsSumitha George, Kaisheng Ma, Ahmedullah Aziz, Xueqing Li, Asif Khan, Sayeef Salahuddin, Meng-Fan Chang, Suman Datta, John Sampson, Sumeet Kumar Gupta, Vijaykrishnan Narayanan. 118 [doi]
- Architecting energy-efficient STT-RAM based register file on GPGPUs via delta compressionHang Zhang, Xuhao Chen, Nong Xiao, Fang Liu. 119 [doi]
- PDS: pseudo-differential sensing scheme for STT-MRAMWang Kang, Tingting Pang, Bi-Wu, Weifeng Lv, Youguang Zhang, Guangyu Sun, Weisheng Zhao. 120 [doi]
- Invited - Things, trouble, trust: on building trust in IoT systemsTigist Abera, N. Asokan, Lucas Davi, Farinaz Koushanfar, Andrew Paverd, Ahmad-Reza Sadeghi, Gene Tsudik. 121 [doi]
- Invited - Can IoT be secured: emerging challenges in connecting the unconnectedNancy Cam-Winget, Ahmad-Reza Sadeghi, Yier Jin. 122 [doi]
- C-brain: a deep learning accelerator that tames the diversity of CNNs through adaptive data-level parallelizationLili Song, Ying Wang, Yinhe Han, Xin Zhao, Bosheng Liu, Xiaowei Li. 123 [doi]
- Dynamic energy-accuracy trade-off using stochastic computing in deep neural networksKyounghoon Kim, Jungki Kim, Joonsang Yu, Jungwoo Seo, Jongeun Lee, Kiyoung Choi. 124 [doi]
- Switched by input: power efficient structure for RRAM-based convolutional neural networkLixue Xia, Tianqi Tang, Wenqin Huangfu, Ming Cheng, Xiling Yin, Boxun Li, Yu Wang, Huazhong Yang. 125 [doi]
- Simplifying deep neural networks for neuromorphic architecturesJaeyong Chung, Taehwan Shin. 126 [doi]
- carry cut-back approximate adder with fixed-point implementation and floating-point precisionVincent Camus, Jeremy Schlachter, Christian C. Enz. 127 [doi]
- An efficient method for multi-level approximate logic synthesis under error rate constraintYi Wu, Weikang Qian. 128 [doi]
- Precise error determination of approximated components in sequential circuits with model checkingArun Chandrasekharan, Mathias Soeken, Daniel Große, Rolf Drechsler. 129 [doi]
- Area optimization of resilient designs guided by a mixed integer geometric programHsin-Ho Huang, Huimei Cheng, Chris C. N. Chu, Peter A. Beerel. 130 [doi]
- On harmonic fixed-priority scheduling of periodic real-time tasks with constrained deadlinesTianyi Wang, Qiushi Han, Shi Sha, Wujie Wen, Gang Quan, Meikang Qiu. 131 [doi]
- A probabilistic scheduling framework for mixed-criticality systemsAlejandro Masrur. 132 [doi]
- Distributed scheduling for many-cores using cooperative game theoryAnuj Pathania, Vanchinathan Venkataramani, Muhammad Shafique, Tulika Mitra, Jörg Henkel. 133 [doi]
- Utilization bounds on allocating rate-monotonic scheduled multi-mode tasks on multiprocessor systemsWen-Hung Huang, Jian-Jia Chen. 134 [doi]
- DAG-aware logic synthesis of datapathsCunxi Yu, Maciej J. Ciesielski, Mihir Choudhury, Andrew Sullivan. 135 [doi]
- Lin-analyzer: a high-level performance analysis tool for FPGA-based acceleratorsGuanwen Zhong, Alok Prakash, Yun Liang, Tulika Mitra, Smaïl Niar. 136 [doi]
- Improving high-level synthesis with decoupled data structure optimizationRitchie Zhao, Gai Liu, Shreesha Srinath, Christopher Batten, Zhiru Zhang. 137 [doi]
- StitchUp: automatic control flow protection for high level synthesis circuitsShane T. Fleming, David B. Thomas. 138 [doi]
- Plug-n-learn: automatic learning of computational algorithms in human-centered internet-of-things applicationsSeyed Ali Rokni, Hassan Ghasemzadeh. 139 [doi]
- A semantics-aware design for mounting remote sensors on mobile systemsYu-Wen Jong, Pi-Cheng Hsiu, Sheng-Wei Cheng, Tei-Wei Kuo. 140 [doi]
- Re-target-able software power management framework using SoC data auto-generationPiyali Goswami, Sushaanth Srirangapathi, Chetan Matad, Stanley Liu. 141 [doi]
- Efficient design space exploration via statistical sampling and AdaBoost learningDandan Li, Shuzhen Yao, Yu-Hang Liu, Senzhang Wang, Xian-He Sun. 142 [doi]
- Invited - Ultra low power integrated transceivers for near-field IoTMihai Sanduleanu, Ibrahim Abe M. Elfadel. 143 [doi]
- Invited - Integrated millimeter-wave/terahertz sensor systems for near-field IoTPayam Heydari. 144 [doi]
- Invited - Who is the major threat to tomorrow's security?: you, the hardware designerWayne Burleson, Onur Mutlu, Mohit Tiwari. 145 [doi]
- High-level synthesis for micro-electrode-dot-array digital microfluidic biochipsZipeng Li, Kelvin Yi-Tse Lai, Po-Hsien Yu, Tsung-Yi Ho, Krishnendu Chakrabarty, Chen-Yi Lee. 146 [doi]
- Columba: co-layout synthesis for continuous-flow microfluidic biochipsTsun-Ming Tseng, Mengchu Li, Bing Li, Tsung-Yi Ho, Ulf Schlichtmann. 147 [doi]
- A quantum annealing approach for boolean satisfiability problemJuexiao Su, Tianheng Tu, Lei He. 148 [doi]
- Unlocking efficiency and scalability of reversible logic synthesis using conventional logic synthesisMathias Soeken, Anupam Chattopadhyay. 149 [doi]
- SwiftGPU: fostering energy efficiency in a near-threshold GPU through a tactical performance boostPrabal Basu, Hu Chen, Shamik Saha, Koushik Chakraborty, Sanghamitra Roy. 150 [doi]
- VR-scale: runtime dynamic phase scaling of processor voltage regulators for improving power efficiencyHadi Asghari Moghaddam, Hamid Reza Ghasemi, Abhishek Arvind Sinkar, Indrani Paul, Nam Sung Kim. 151 [doi]
- Exploration of associative power management with instruction governed operation for ultra-low power designTianyu Jia, Yuanbo Fan, Russ Joseph, Jie Gu. 152 [doi]
- MORPh: mobile OLED-friendly recording and playback system for low power video streamingXiang Chen, Jiachen Mao, Jiafei Gao, Kent W. Nixon, Yiran Chen. 153 [doi]
- HW/SW co-design of nonvolatile IO system in energy harvesting sensor nodes for optimal data acquisitionZewei Li, Yongpan Liu, Daming Zhang, Chun Jason Xue, Zhangyuan Wang, Xin Shi, Wenyu Sun, Jiwu Shu, Huazhong Yang. 154 [doi]
- Shift sprinting: fine-grained temperature-aware NoC-based MCSoC architecture in dark silicon ageAmin Rezaei, Dan Zhao, Masoud Daneshtalab, Hongyi Wu. 155 [doi]
- Performance-aware task scheduling for energy harvesting nonvolatile processors considering power switching overheadHehe Li, Yongpan Liu, Chenchen Fu, Chun Jason Xue, Donglai Xiang, Jinshan Yue, Jinyang Li, Daming Zhang, Jingtong Hu, Huazhong Yang. 156 [doi]
- An FPGA-based infrastructure for fine-grained DVFS analysis in high-performance embedded systemsPaolo Mantovani, Emilio G. Cota, Kevin Tien, Christian Pilato, Giuseppe Di Guglielmo, Kenneth L. Shepard, Luca P. Carloni. 157 [doi]
- MIRROR: symmetric timing analysis for real-time tasks on multicore platforms with shared resourcesWen-Hung Huang, Jian-Jia Chen, Jan Reineke. 158 [doi]
- Real-time co-scheduling of multiple dataflow graphs on multi-processor systemsShin-Haeng Kang, Duseok Kang, Hoeseok Yang, Soonhoi Ha. 159 [doi]
- Optimal and fast throughput evaluation of CSDFBruno Bodin, Alix Munier Kordon, Benoît Dupont de Dinechin. 160 [doi]
- An expected hypervolume improvement algorithm for architectural exploration of embedded processorsHongwei Wang, Jinglin Shi, Ziyuan Zhu. 161 [doi]
- Standard lattices in hardwareJames Howe, Ciara Moore, Máire O'Neill, Francesco Regazzoni, Tim Güneysu, K. Beeden. 162 [doi]
- Strategy without tactics: policy-agnostic hardware-enhanced control-flow integrityDean Sullivan, Orlando Arias, Lucas Davi, Per Larsen, Ahmad-Reza Sadeghi, Yier Jin. 163 [doi]
- Practical public PUF enabled by solving max-flow problem on chipMeng Li, Jin Miao, Kai Zhong, David Z. Pan. 164 [doi]
- The cat and mouse in split manufacturingYujie Wang, Pu Chen, Jiang Hu, Jeyavijayan Rajendran. 165 [doi]
- SECRET: smartly EnCRypted energy efficient non-volatile memoriesShivam Swami, Joydeep Rakshit, Kartik Mohanram. 166 [doi]
- Exploiting design-for-debug for flexible SoC security architectureAbhishek Basak, Swarup Bhunia, Sandip Ray. 167 [doi]
- Fine-granularity tile-level parallelism in non-volatile memory architecture with two-dimensional bank subdivisionMatthew Poremba, Tao Zhang, Yuan Xie 0001. 168 [doi]
- MTJ variation monitor-assisted adaptive MRAM writeShaodi Wang, Hochul Lee, Cecile Grezes, Pedram Khalili, Kang L. Wang, Puneet Gupta. 169 [doi]
- AOS: adaptive overwrite scheme for energy-efficient MLC STT-RAM cacheXunchao Chen, Navid Khoshavi, Jian Zhou, Dan Huang, Ronald F. DeMara, Jun Wang, Wujie Wen, Yiran Chen. 170 [doi]
- Two-step state transition minimization for lifetime and performance improvement on MLC STT-RAMHuizhang Luo, Jingtong Hu, Liang Shi, Chun Jason Xue, Qingfeng Zhuge. 171 [doi]
- Write-back aware shared last-level cache management for hybrid main memoryDeshan Zhang, Lei Ju, Mengying Zhao, Xiang Gao, Zhiping Jia. 172 [doi]
- Pinatubo: a processing-in-memory architecture for bulk bitwise operations in emerging non-volatile memoriesShuangchen Li, Cong Xu, Qiaosha Zou, Jishen Zhao, Yu Lu, Yuan Xie. 173 [doi]
- Invited - A box of dots: using scan-based path delay test for timing verificationAlfred L. Crouch, John C. Potter. 174 [doi]