VLSI architecture design of motion estimator and in-loop filter for MPEG-4 AVC/H.264 encoders

Yueh-Yi Wang, Yan-Tsung Peng, Chun-Jen Tsai. VLSI architecture design of motion estimator and in-loop filter for MPEG-4 AVC/H.264 encoders. In ISCAS (4). pages 149-152, 2004.

@inproceedings{WangPT04,
  title = {VLSI architecture design of motion estimator and in-loop filter for MPEG-4 AVC/H.264 encoders},
  author = {Yueh-Yi Wang and Yan-Tsung Peng and Chun-Jen Tsai},
  year = {2004},
  tags = {architecture, design},
  researchr = {https://researchr.org/publication/WangPT04},
  cites = {0},
  citedby = {0},
  pages = {149-152},
  booktitle = {ISCAS (4)},
}