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Optimizing MLC-based STT-RAM caches by dynamic block size reconfiguration

Jianxing Wang, Pooja Roy, Weng-Fai Wong, Xiuyuan Bi, Hai Li. Optimizing MLC-based STT-RAM caches by dynamic block size reconfiguration. In 32nd IEEE International Conference on Computer Design, ICCD 2014, Seoul, South Korea, October 19-22, 2014. pages 133-138, IEEE, 2014. [doi]

Authors

Jianxing Wang

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Pooja Roy

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Weng-Fai Wong

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Xiuyuan Bi

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Hai Li

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