Jianxing Wang, Pooja Roy, Weng-Fai Wong, Xiuyuan Bi, Hai Li. Optimizing MLC-based STT-RAM caches by dynamic block size reconfiguration. In 32nd IEEE International Conference on Computer Design, ICCD 2014, Seoul, South Korea, October 19-22, 2014. pages 133-138, IEEE, 2014. [doi]
Abstract is missing.