Yan Wang, Chi-Ying Tsui, Roger S. Cheng. A low power VLSI architecture of SOVA-based turbo-code decoder using scarce state transition scheme. In IEEE International Symposium on Circuits and Systems, ISCAS 2000, Emerging Technologies for the 21st Century, Geneva, Switzerland, 28-31 May 2000, Proceedings. pages 283-286, IEEE, 2000. [doi]
@inproceedings{WangTC00-0,
title = {A low power VLSI architecture of SOVA-based turbo-code decoder using scarce state transition scheme},
author = {Yan Wang and Chi-Ying Tsui and Roger S. Cheng},
year = {2000},
doi = {10.1109/ISCAS.2000.857085},
url = {https://doi.org/10.1109/ISCAS.2000.857085},
researchr = {https://researchr.org/publication/WangTC00-0},
cites = {0},
citedby = {0},
pages = {283-286},
booktitle = {IEEE International Symposium on Circuits and Systems, ISCAS 2000, Emerging Technologies for the 21st Century, Geneva, Switzerland, 28-31 May 2000, Proceedings},
publisher = {IEEE},
}