A low power VLSI architecture of SOVA-based turbo-code decoder using scarce state transition scheme

Yan Wang, Chi-Ying Tsui, Roger S. Cheng. A low power VLSI architecture of SOVA-based turbo-code decoder using scarce state transition scheme. In IEEE International Symposium on Circuits and Systems, ISCAS 2000, Emerging Technologies for the 21st Century, Geneva, Switzerland, 28-31 May 2000, Proceedings. pages 283-286, IEEE, 2000. [doi]

Abstract

Abstract is missing.