On generation of the minimum pattern set for data path elements in SoC design verification based on port order fault model

Chun-Yao Wang, Shing-Wu Tung, Jing-Yang Jou. On generation of the minimum pattern set for data path elements in SoC design verification based on port order fault model. In Proceedings of the Sixth IEEE International High-Level Design Validation and Test Workshop 2001, Monterey, California, USA, November 7-9, 2001. pages 145-150, IEEE Computer Society, 2001. [doi]

Authors

Chun-Yao Wang

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Shing-Wu Tung

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Jing-Yang Jou

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