Jianxing Wang, Yenni Tim, Weng-Fai Wong, Zhong-Liang Ong, Zhenyu Sun, Hai Helen Li. A coherent hybrid SRAM and STT-RAM L1 cache architecture for shared memory multicores. In 19th Asia and South Pacific Design Automation Conference, ASP-DAC 2014, Singapore, January 20-23, 2014. pages 610-615, IEEE, 2014. [doi]
Abstract is missing.