Design high bandwidth-density, low latency and energy efficient on-chip interconnect

Yong Wang, Hui Wu. Design high bandwidth-density, low latency and energy efficient on-chip interconnect. In 2017 IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2017, Taipei, Taiwan, July 24-26, 2017. pages 1-6, IEEE, 2017. [doi]

@inproceedings{WangW17-43,
  title = {Design high bandwidth-density, low latency and energy efficient on-chip interconnect},
  author = {Yong Wang and Hui Wu},
  year = {2017},
  doi = {10.1109/ISLPED.2017.8009171},
  url = {https://doi.org/10.1109/ISLPED.2017.8009171},
  researchr = {https://researchr.org/publication/WangW17-43},
  cites = {0},
  citedby = {0},
  pages = {1-6},
  booktitle = {2017 IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2017, Taipei, Taiwan, July 24-26, 2017},
  publisher = {IEEE},
  isbn = {978-1-5090-6023-8},
}