A 3.3-V/5-V low power TTL-to-CMOS input buffer

Chi-Chang Wang, Jiin-Chuan Wu. A 3.3-V/5-V low power TTL-to-CMOS input buffer. J. Solid-State Circuits, 33(4):598-603, 1998. [doi]

@article{WangW98-9,
  title = {A 3.3-V/5-V low power TTL-to-CMOS input buffer},
  author = {Chi-Chang Wang and Jiin-Chuan Wu},
  year = {1998},
  doi = {10.1109/4.663565},
  url = {https://doi.org/10.1109/4.663565},
  researchr = {https://researchr.org/publication/WangW98-9},
  cites = {0},
  citedby = {0},
  journal = {J. Solid-State Circuits},
  volume = {33},
  number = {4},
  pages = {598-603},
}