Sheng Wang 0005, Xiaoyan Xiang, Chen Chen, Jianyi Meng. An energy-efficient microprocessor using multilevel error correction for timing error tolerance. In 2015 IEEE 11th International Conference on ASIC, ASICON 2015, Chengdu, China, November 3-6, 2015. pages 1-4, IEEE, 2015. [doi]
@inproceedings{WangXCM15,
title = {An energy-efficient microprocessor using multilevel error correction for timing error tolerance},
author = {Sheng Wang 0005 and Xiaoyan Xiang and Chen Chen and Jianyi Meng},
year = {2015},
doi = {10.1109/ASICON.2015.7517180},
url = {https://doi.org/10.1109/ASICON.2015.7517180},
researchr = {https://researchr.org/publication/WangXCM15},
cites = {0},
citedby = {0},
pages = {1-4},
booktitle = {2015 IEEE 11th International Conference on ASIC, ASICON 2015, Chengdu, China, November 3-6, 2015},
publisher = {IEEE},
isbn = {978-1-4799-8485-5},
}