Feng Wang 0004, Yuan Xie, R. Rajaraman, Balaji Vaidyanathan. Soft Error Rate Analysis for Combinational Logic Using An Accurate Electrical Masking Model. In 20th International Conference on VLSI Design (VLSI Design 2007), Sixth International Conference on Embedded Systems (ICES 2007), 6-10 January 2007, Bangalore, India. pages 165-170, IEEE Computer Society, 2007. [doi]
Abstract is missing.