A 6-bit 1GS/s DAC using an area efficient switching scheme for gradient-error tolerance

Haonan Wang, Yufeng Yao, Tao Wang, Hui Wang, Yuhua Cheng. A 6-bit 1GS/s DAC using an area efficient switching scheme for gradient-error tolerance. IEICE Electronic Express, 10(11):20130328, 2013. [doi]

Abstract

Abstract is missing.