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A 500-MHz low-power five-port CMOS register file

Jiajing Wang, Qianling Zhang. A 500-MHz low-power five-port CMOS register file. In Hiroto Yasuura, editor, Proceedings of the 2003 Asia and South Pacific Design Automation Conference, ASP-DAC '03, Kitakyushu, Japan, January 21-24, 2003. pages 511-514, ACM, 2003. [doi]

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