A case for exploiting complex arithmetic circuits towards performance yield enhancement

Shingo Watanabe, Masanori Hashimoto, Toshinori Sato. A case for exploiting complex arithmetic circuits towards performance yield enhancement. In 10th International Symposium on Quality of Electronic Design (ISQED 2009), 16-18 March 2009, San Jose, CA, USA. pages 401-407, IEEE, 2009. [doi]

@inproceedings{WatanabeHS09,
  title = {A case for exploiting complex arithmetic circuits towards performance yield enhancement},
  author = {Shingo Watanabe and Masanori Hashimoto and Toshinori Sato},
  year = {2009},
  doi = {10.1109/ISQED.2009.4810328},
  url = {http://dx.doi.org/10.1109/ISQED.2009.4810328},
  researchr = {https://researchr.org/publication/WatanabeHS09},
  cites = {0},
  citedby = {0},
  pages = {401-407},
  booktitle = {10th International Symposium on Quality of Electronic Design (ISQED 2009), 16-18 March 2009, San Jose, CA, USA},
  publisher = {IEEE},
}