An Implementation of a World Grid Square Codes Generator on a RISC-V Processor - researchr publication authors

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Rei Watanabe, Jubee Tada, Keiichi Sato. An Implementation of a World Grid Square Codes Generator on a RISC-V Processor. In Ninth International Symposium on Computing and Networking, CANDAR 2021 - Workshops, Matsue, Japan, 23-26 November 2021. pages 309-312, IEEE, 2021. [doi]

This author has not been identified. Look up 'Rei Watanabe' in GoogleThis author has not been identified. Look up 'Jubee Tada' in GoogleThis author has not been identified. Look up 'Keiichi Sato' in Google

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