An Implementation of a World Grid Square Codes Generator on a RISC-V Processor

Rei Watanabe, Jubee Tada, Keiichi Sato. An Implementation of a World Grid Square Codes Generator on a RISC-V Processor. In Ninth International Symposium on Computing and Networking, CANDAR 2021 - Workshops, Matsue, Japan, 23-26 November 2021. pages 309-312, IEEE, 2021. [doi]

Abstract

Abstract is missing.