Beyond Verilog: Evaluating Chisel versus High-level Synthesis with Tiny Designs

Xiangdong Wei, Xinfei Guo. Beyond Verilog: Evaluating Chisel versus High-level Synthesis with Tiny Designs. In 23rd International Symposium on Quality Electronic Design, ISQED 2022, Santa Clara, CA, USA, April 6-7, 2022. pages 1, IEEE, 2022. [doi]

@inproceedings{WeiG22-1,
  title = {Beyond Verilog: Evaluating Chisel versus High-level Synthesis with Tiny Designs},
  author = {Xiangdong Wei and Xinfei Guo},
  year = {2022},
  doi = {10.1109/ISQED54688.2022.9806141},
  url = {https://doi.org/10.1109/ISQED54688.2022.9806141},
  researchr = {https://researchr.org/publication/WeiG22-1},
  cites = {0},
  citedby = {0},
  pages = {1},
  booktitle = {23rd International Symposium on Quality Electronic Design, ISQED 2022, Santa Clara, CA, USA, April 6-7, 2022},
  publisher = {IEEE},
  isbn = {978-1-6654-9466-3},
}