3-D memory organization and performance analysis for multi-processor network-on-chip architecture - researchr publication authors

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Awet Yemane Weldezion, Zhonghai Lu, Roshan Weerasekera, Hannu Tenhunen. 3-D memory organization and performance analysis for multi-processor network-on-chip architecture. In IEEE International Conference on 3D System Integration, 3DIC 2009, San Francisco, California, USA, 28-30 September 2009. pages 1-7, IEEE, 2009. [doi]

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