Timing Optimization in Sequential Circuit by Exploiting Clock-Gating Logic

Shih-Hung Weng, Yu-Min Kuo, Shih-Chieh Chang. Timing Optimization in Sequential Circuit by Exploiting Clock-Gating Logic. ACM Trans. Design Autom. Electr. Syst., 17(2):16, 2012. [doi]

Abstract

Abstract is missing.