A 2Gb/s high-speed scalable shift-register based on-chip serial communication design for SoC applications

I-Chyn Wey, Lung-Hao Chang, You-Gang Chen, Shih-Hung Chang, An-Yeu Wu. A 2Gb/s high-speed scalable shift-register based on-chip serial communication design for SoC applications. In International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan. pages 1074-1077, IEEE, 2005. [doi]

@inproceedings{WeyCCCW05,
  title = {A 2Gb/s high-speed scalable shift-register based on-chip serial communication design for SoC applications},
  author = {I-Chyn Wey and Lung-Hao Chang and You-Gang Chen and Shih-Hung Chang and An-Yeu Wu},
  year = {2005},
  doi = {10.1109/ISCAS.2005.1464778},
  url = {http://dx.doi.org/10.1109/ISCAS.2005.1464778},
  tags = {design},
  researchr = {https://researchr.org/publication/WeyCCCW05},
  cites = {0},
  citedby = {0},
  pages = {1074-1077},
  booktitle = {International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan},
  publisher = {IEEE},
}