A 2Gb/s high-speed scalable shift-register based on-chip serial communication design for SoC applications - researchr publication

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I-Chyn Wey, Lung-Hao Chang, You-Gang Chen, Shih-Hung Chang, An-Yeu Wu. A 2Gb/s high-speed scalable shift-register based on-chip serial communication design for SoC applications. In International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan. pages 1074-1077, IEEE, 2005. [doi]

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