SyReC: A hardware description language for the specification and synthesis of reversible circuits

Robert Wille, Eleonora Schönborn, Mathias Soeken, Rolf Drechsler. SyReC: A hardware description language for the specification and synthesis of reversible circuits. Integration, 53:39-53, 2016. [doi]

@article{WilleSSD16,
  title = {SyReC: A hardware description language for the specification and synthesis of reversible circuits},
  author = {Robert Wille and Eleonora Schönborn and Mathias Soeken and Rolf Drechsler},
  year = {2016},
  doi = {10.1016/j.vlsi.2015.10.001},
  url = {http://dx.doi.org/10.1016/j.vlsi.2015.10.001},
  researchr = {https://researchr.org/publication/WilleSSD16},
  cites = {0},
  citedby = {0},
  journal = {Integration},
  volume = {53},
  pages = {39-53},
}