Robert Wille, Marcel Walter, Frank Sill Torres, Daniel Große, Rolf Drechsler. Ignore Clocking Constraints: An Alternative Physical Design Methodology for Field-Coupled Nanotechnologies. In 2019 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2019, Miami, FL, USA, July 15-17, 2019. pages 651-656, IEEE, 2019. [doi]
@inproceedings{WilleWTGD19,
title = {Ignore Clocking Constraints: An Alternative Physical Design Methodology for Field-Coupled Nanotechnologies},
author = {Robert Wille and Marcel Walter and Frank Sill Torres and Daniel Große and Rolf Drechsler},
year = {2019},
doi = {10.1109/ISVLSI.2019.00121},
url = {https://doi.org/10.1109/ISVLSI.2019.00121},
researchr = {https://researchr.org/publication/WilleWTGD19},
cites = {0},
citedby = {0},
pages = {651-656},
booktitle = {2019 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2019, Miami, FL, USA, July 15-17, 2019},
publisher = {IEEE},
isbn = {978-1-7281-3391-1},
}