Low Latency Clock Domain Transfer for Simultaneously Mesochronous, Plesiochronous and Heterochronous Interfaces

Wade L. Williams, Philip E. Madrid, Scott C. Johnson. Low Latency Clock Domain Transfer for Simultaneously Mesochronous, Plesiochronous and Heterochronous Interfaces. In 13th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2007), 12-14 March 2006, Berkeley, California, USA. pages 196-204, IEEE Computer Society, 2007. [doi]

Abstract

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