The memory/logic interface in FPGAs with large embedded memory arrays

Steven J. E. Wilton, Jonathan Rose, Zvonko G. Vranesic. The memory/logic interface in FPGAs with large embedded memory arrays. IEEE Trans. VLSI Syst., 7(1):80-91, 1999. [doi]

@article{WiltonRV99,
  title = {The memory/logic interface in FPGAs with large embedded memory arrays},
  author = {Steven J. E. Wilton and Jonathan Rose and Zvonko G. Vranesic},
  year = {1999},
  doi = {10.1109/92.748203},
  url = {http://doi.ieeecomputersociety.org/10.1109/92.748203},
  tags = {e-science, logic},
  researchr = {https://researchr.org/publication/WiltonRV99},
  cites = {0},
  citedby = {0},
  journal = {IEEE Trans. VLSI Syst.},
  volume = {7},
  number = {1},
  pages = {80-91},
}