Microarchitectural Timing Channels and their Prevention on an Open-Source 64-bit RISC-V Core

Nils Wistoff, Moritz Schneider, Frank K. Gürkaynak, Luca Benini, Gernot Heiser. Microarchitectural Timing Channels and their Prevention on an Open-Source 64-bit RISC-V Core. In Design, Automation & Test in Europe Conference & Exhibition, DATE 2021, Grenoble, France, February 1-5, 2021. pages 627-632, IEEE, 2021. [doi]

Abstract

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