Lightweight and High Performance SHA-256 using Architectural Folding and 4-2 Adder Compressor - researchr publication authors

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Ming Ming Wong, Vikramkumar Pudi, Anupam Chattopadhyay. Lightweight and High Performance SHA-256 using Architectural Folding and 4-2 Adder Compressor. In IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2018, Verona, Italy, October 8-10, 2018. pages 95-100, IEEE, 2018. [doi]

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