Abstract is missing.
- ReRAM-based In-Memory Computation of Galois Field arithmeticSwagata Mandal, Debjyoti Bhattacharjee, Yaswanth Tavva, Anupam Chattopadhyay. 1-6 [doi]
- Minimizing Performance and Energy Overheads Due to Fanout In Memristor based Logic ImplementationsMd. Adnan Zaman, Srinivas Katkoori. 7-12 [doi]
- Versatile Ring-Based Architecture and Synthesis Flow for General-Purpose Digital Microfluidic BiochipsJuinn-Dar Huang, Chia-Hung Liu, Wei-Hao Yang. 13-18 [doi]
- Directed Graph Placement for SNN Simulation into a multi-core GALS ArchitectureFrancesco Barchi, Gianvito Urgese, Andrea Acquaviva, Enrico Macii. 19-24 [doi]
- Traffic Aware Deflection Rerouting Mechanism for Mesh Network on ChipSimi Zerine Sleeba, John Jose, Maurizio Palesi, Rekha K. James, Maniyelil Govindankutty Mini. 25-30 [doi]
- A Parallel Hardware Architecture For Quantum Annealing Algorithm AccelerationEvelina Forno, Andrea Acquaviva, Yuki Kobayashi, Enrico Macii, Gianvito Urgese. 31-36 [doi]
- An Instruction Set Architecture for Low-power, Dynamic IoT CommunicationShahzad Muzaffar, Ibrahim Abe M. Elfadel. 37-42 [doi]
- An Open-Source Verification Framework for Open-Source Cores: A RISC-V Case StudyPasquale Davide Schiavone, Ernesto Sánchez 0001, Annachiara Ruospo, Francesco Minervini, Florian Zaruba, Germain Haugou, Luca Benini. 43-48 [doi]
- On the Rectifiability of Arithmetic Circuits using Craig Interpolants in Finite FieldsUtkarsh Gupta, Irina Ilioaea, Vikas Rao, Arpitha Srinath, Priyank Kalla, Florian Enescu. 49-54 [doi]
- A Synthesizable Digital Low-Dropout Regulator Based on Voltage-to-Time ConversionNaoki Ojima, Toru Nakura, Tetsuya Iizuka, Kunihiro Asada. 55-58 [doi]
- An analysis of test solutions for COTS-based systems in space applicationsRiccardo Cantoro, Sara Carbonara, Andrea Floridia, Ernesto Sánchez 0001, Matteo Sonza Reorda, Jan-Gerd Mess. 59-64 [doi]
- Robust Detection of Bridge Defects in STT-MRAM Cells Under Process VariationsAndres F. Gomez, Freddy Forero, Kaushik Roy, Víctor H. Champac. 65-70 [doi]
- Evaluating the Impact of Process Variability and Radiation Effects on Different Transistor ArrangementsLeonardo H. Brendler, Alexandra L. Zimpeck, Cristina Meinhardt, Ricardo Reis. 71-76 [doi]
- An accurate novel gate-sizing metric to optimize circuit performance under local intra-die process variationsZahira Perez, Hector Villacorta, Víctor H. Champac. 77-82 [doi]
- On the Effectiveness of the Satisfiability Attack on Split Manufactured CircuitsSuyuan Chen, Ranga Vemuri. 83-88 [doi]
- Secure and Compact Full NTRU Hardware ImplementationKonstantin Braun, Tim Fritzmann, Georg Maringer, Thomas Schamberger, Johanna Sepúlveda. 89-94 [doi]
- Lightweight and High Performance SHA-256 using Architectural Folding and 4-2 Adder CompressorMing Ming Wong, Vikramkumar Pudi, Anupam Chattopadhyay. 95-100 [doi]
- Low-budget Energy Sector Cyberattacks via Open Source ExploitationAnastasis Keliris, Charalambos Konstantinou, Marios Sazos, Michail Maniatakos. 101-106 [doi]
- Differential Power Analysis Mitigation Technique Using Three-Independent-Gate Field Effect TransistorsEdouard Giacomin, Pierre-Emmanuel Gaillardon. 107-112 [doi]
- Energy-Driven Precision Scaling for Fixed-Point ConvNetsValentino Peluso, Andrea Calimera. 113-118 [doi]
- Enhancing Performance of Computer Vision Applications on Low-Power Embedded Systems Through Heterogeneous Parallel ProgrammingStefano Aldegheri, Silvia Manzato, Nicola Bombieri. 119-124 [doi]
- An FPGA-based Hardware Accelerator for Scene Text Character RecognitionLuiz Antonio de Oliveira Junior, Edna Barros. 125-130 [doi]
- VLSI-Architecture of Radix-2/4/8 SISO Decoder for Turbo Decoding at Multiple Data-ratesRahul Shrestha, Ashutosh Sharma. 131-136 [doi]
- Two Combinatorial Problems on the Layout of Switching LatticesAnna Bernasconi 0001, Antonio Boffa, Fabrizio Luccio, Linda Pagli. 137-142 [doi]
- HLS Support for Polymorphic Parallel MemoriesLuca Stornaiuolo, Marco Rabozzi, Donatella Sciuto, Marco D. Santambrogio, Giulio Stramondo, Catalin Bogdan Ciobanu, Ana Lucia Varbanescu. 143-148 [doi]
- Inferential Logic: a Machine Learning Inspired Paradigm for Combinational CircuitsValerio Tenace, Andrea Calimera. 149-154 [doi]
- Implantable IoT System for Closed-Loop Epilepsy Control based on Electrical NeuromodulationReza Ranjandish, Alexandre Schmid. 155-158 [doi]
- Mobile Phones Hematophagous Diptera Surveillance in the field using Deep Learning and Wing Interference PatternsMarc Souchaud, Pierre Jacob, Camille Simon Chane, Aymeric Histace, Olivier Romain, Maurice Tchuente, Denis Sereno. 159-162 [doi]
- Radar for assisted living in the context of Internet of Things for Health and beyondJulien Le Kernec, Francesco Fioranelli, Shufan Yang, Jordane Lorandel, Olivier Romain. 163-167 [doi]
- A Hybrid Bioimpedance Spectroscopy Architecture for a Wide Frequency Exploration of Tissue Electrical PropertiesAchraf Lamlih, Philippe Freitas, Mohamed Moez Belhaj, Jérémie Salles, Vincent Kerzerho, Fabien Soulier, Serge Bernard, Tristan Rouyer, Sylvain Bonhommeau. 168-171 [doi]
- *Görschwin Fey, Tara Ghasempouri, Swen Jacobs, Gianluca Martino, Jaan Raik, Heinz Riener. 172-175 [doi]
- Neuromorphic Computing - From Robust Hardware Architectures to Testing StrategiesLorena Anghel, Denys Ly, Giorgio Di Natale, Benoit Miramond, Elena Ioana Vatajelu, Elisa Vianello. 176-179 [doi]
- Prospects for energy-efficient edge computing with integrated HfO2-based ferroelectric devicesIan OrConnor, Mayeul Cantan, Cédric Marchand 0002, Bertrand Vilquin, Stefan Slesazeck, Evelyn T. Breyer, Halid Mulaosmanovic, Thomas Mikolajick, Bastien Giraud, Jean-Philippe Noel, Adrian M. Ionescu, Igor Stolichnov. 180-183 [doi]
- Multi-bit nonvolatile flip-flop based on NAND-like spin transfer torque MRAMErya Deng, Zhaohao Wang, Wang Kang, Shaoqian Wei, Weisheng Zhao. 184-187 [doi]
- From Spintronic Devices to Hybrid CMOS/Magnetic System On ChipSophiane Senni, Frederic Ouattara, Jad Modad, Kaan Sevin, Guillaume Patrigeon, Pascal Benoit, Pascal Nouet, Lionel Torres, François Duhem, Gregory di Pendina, Guillaume Prenat. 188-191 [doi]
- Reliable ReRAM-based Logic Operations for Computing in MemoryMathieu Moreau, Eloi Muhr, Marc Bocquet, Hassen Aziza, Jean Michel Portal, Bastien Giraud, Jean-Philippe Noel. 192-195 [doi]
- An ultra-low power active diode using a hysteresis common gate comparator for low-voltage and low-power energy harvesting systemsKaori Matsumoto, Tetsuya Hirose, Hiroki Asano, Yuto Tsuji, Yuichiro Nakazawa, Nobutaka Kuroki, Masahiro Numa. 196-200 [doi]
- A Bandwidth-Aware Authentication Scheme for Packet-Integrity Attack Detection on Trojan Infected NoCMubashir Hussain, Hui Guo. 201-206 [doi]
- Upgrading QoSinNoC: Efficient Routing for Mixed-Criticality Applications and Power AnalysisSerhiy Avramenko, Siavoosh Payandeh Azad, Behrad Niazmand, Massimo Violante, Jaan Raik, Maksim Jenihhin. 207-212 [doi]
- Testability of Switching Lattices in the Stuck at Fault ModelAnna Bernasconi 0001, Valentina Ciriani, Luca Frontini. 213-218 [doi]
- An MCTS-based Framework for Synthesis of Approximate CircuitsMuhammad Awais, Hassan Ghasemzadeh Mohammadi, Marco Platzner. 219-224 [doi]
- FLUTE-EM: Electromigration-Optimized Net Considering Topology Currents and Mechanical StressSteve Bigalke, Jens Lienig. 225-230 [doi]
- Meta-model Based Automation of Properties for Pre-Silicon VerificationKeerthikumara Devarajegowda, Wolfgang Ecker. 231-236 [doi]
- Cyber-Physical Systems Integration in a Production Line SimulatorStefano Centomo, Marco Panato, Franco Fummi. 237-242 [doi]
- Key Architectural Optimizations for Hardware Efficient JPEG-LS EncoderYakup Murat. 243-248 [doi]
- A graph-based approach for mobile localization exploiting real and virtual landmarksFlorenc Demrozi, Kevin Costa, Federico Tramarin, Graziano Pravadelli. 249-254 [doi]
- Understanding the Design Space of Wavelength-Routed Optical NoC Topologies for Power-Performance OptimizationMahdi Tala, Davide Bertozzi. 255-260 [doi]
- Design of Latch based Configurable Ring Oscillator PUF Targeting Secure FPGAMahabub Hasan Mahalat, Nikhil Ugale, Rohit Shahare, Bibhash Sen. 261-266 [doi]
- A low power keyword spotting algorithm for memory constrained embedded systemsGionata Benelli, Gabriele Meoni, Luca Fanucci. 267-272 [doi]