A 0.22 nJ/b/iter 0.13 μm turbo decoder chip using inter-block permutation interleaver

Cheng-Chi Wong, Cheng-Hao Tang, Ming-Wei Lai, Yan-Xiu Zheng, Chien-Ching Lin, Hsie-Chia Chang, Chen-Yi Lee, Yu. T. Su. A 0.22 nJ/b/iter 0.13 μm turbo decoder chip using inter-block permutation interleaver. In Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, CICC 2007, DoubleTree Hotel, San Jose, California, USA, September 16-19, 2007. pages 273-276, IEEE, 2007. [doi]

Abstract

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