Evaluation of energy-efficient latch circuits with hybrid tunneling FET and FinFET devices for ultra-low-voltage applications - researchr publication authors

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Tse-Ching Wu, Chien-Ju Chen, Yin-Nien Chen, Vita Pi-Ho Hu, Pin Su, Ching-Te Chuang. Evaluation of energy-efficient latch circuits with hybrid tunneling FET and FinFET devices for ultra-low-voltage applications. In 28th IEEE International System-on-Chip Conference, SOCC 2015, Beijing, China, September 8-11, 2015. pages 339-344, IEEE, 2015. [doi]

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