Abstract is missing.
- "Unicorns and centaurs: Architecting SOCs for software defined networking"Gavin Stark. [doi]
- "Venice: A cost-effective architecture for datacenter servers"Rui Hou. [doi]
- "Five Forces Shaping the Silicon World: Advanced sensing and intelligence in IoT and vision"Chris Rowen. [doi]
- "High-level synthesis and beyond - From datacenters to IoTs"Jason Cong. [doi]
- A 12-bit 1.74-mW 20-MS/s DAC with resistor-string and current-steering hybrid architectureBill Ma, Qinjin Huang, Fengqi Yu. 1-6 [doi]
- A process-variation-aware multi-scenario high-level synthesis algorithm for distributed-register architecturesKoki Igawa, Youhua Shi, Masao Yanagisawa, Nozomu Togawa. 7-12 [doi]
- Designing a SoC to control the next-generation space exploration flight science instrumentsXabier Iturbe, Didier Keymeulen, Emre Ozer, Patrick Yiu, Daniel Berisford, Kevin Hand, Robert Carlson. 13-18 [doi]
- A 20 GHz high speed, low jitter, high accuracy and wide correction range duty cycle correctorJun Guo, Peng Liu 0016, Weidong Wang, Jicheng Chen, Yingtao Jiang. 19-24 [doi]
- A 5-b 1-GS/s 2.7-mW binary-search ADC in 90nm digital CMOSYung-Hui Chung, Cheng-Hsun Tsai, Hsuan-Chin Yeh. 25-29 [doi]
- All-digital deskew buffer using a hybrid control schemeTing-Li Chu, Wen-Yu Chu, Yasuyoshi Fujii, Chorng-Sii Hwang. 30-34 [doi]
- A 0.68 pJ/bit inductor-less optical receiver for 20 Gbps with 0.0025 mm2 area in 28 nm CMOSLászló Szilágyi, Ronny Henker, Frank Ellinger. 35-39 [doi]
- A 320MHz-2.56GHz low jitter phase-locked loop with adaptive-bandwidth techniqueSeok Min Jung, Janet Meiling Roveda. 40-43 [doi]
- A 802.15.3c/802.11ad compliant 24 Gb/s FFT processor for 60 GHz communication systemsHenry Lopez Davila, Chun-Yi Liu, Wei-Chang Liu, Shen-Jui Huang, Shyh-Jye Jou, Sau-Gee Chen. 44-48 [doi]
- A 1.2V wide-band reconfigurable mixer for wireless application in 65nm CMOS technologyNisha Gupta, A. R. Aravinth Kumar, Ashudeb Dutta, Shiv Govind Singh. 49-52 [doi]
- Statistical rare event analysis using smart sampling and parameter guidanceYue Zhao, Hosoon Shin, Hai-Bao Chen, Sheldon X.-D. Tan, Guoyong Shi, Xin Li. 53-58 [doi]
- Per-flow state management technique for high-speed networksXin Yang, Sakir Sezer. 59-63 [doi]
- KnapSim - Run-time efficient hardware-software partitioning technique for FPGAsKratika Garg, Yan Lin Aung, Siew Kei Lam, Thambipillai Srikanthan. 64-69 [doi]
- Optimal realization of switched-capacitor circuits by symbolic analysisYanjie Gu, Guoyong Shi. 70-73 [doi]
- A tunable inverter-based, low-voltage OTA for continuous-time ΣΔ ADCIslam Mostafa, Ayman Ismail. 74-77 [doi]
- A high-gain low-power low-noise-figure differential CMOS LNA with 33% current-reused negative-conductance accommodation structureTo-Po Wang, Shih-Hua Chiang. 78-81 [doi]
- A comparative study of multi-GHz LCVCOs designed in 28nm CMOS technologyE. K. Jorgensen, P. R. Mukund. 82-87 [doi]
- Multi-objective optimization of a low-noise antenna amplifier for multi-constellation satellite-navigation receiversJosef Dobes, Jan Míchal, Jakub Popp, Martin Grábner, Frantisek Vejrazka, Jakub Kakona. 88-93 [doi]
- A digital-control sensorless current-mode boost converter with non-zero error bin compensation and seamless mode transitionYanqi Zheng, Marco Ho, Ka Nang Leung, Jianping Guo, Biao Chen. 94-99 [doi]
- Novel ECC structure and evaluation method for NAND flash memoryXiao-bo Jiang, Xue-qing Tan, Wei-pei Huang. 100-104 [doi]
- Floorplan and congestion aware framework for optimal SRAM selection for memory subsystemsGaurav Narang, Alexander Fell, Prakhar Raj Gupta, Anuj Grover. 105-110 [doi]
- An improved distributed video coding with low-complexity motion estimation at encoderHsin-Ping Yang, Hsiao-Chi Hsieh, Sheng-Hsiang Chang, Sao-Jie Chen. 111-114 [doi]
- Modelling visual attention towards embodiment cognition on a reconfigurable and programmable systemShufan Yang, Renfa Li, Qiang Wu. 115-120 [doi]
- A filter design to increase accuracy of Lucy-Richardson deconvolution for analyzing RTN mixtures effects on VLSI reliability marginHiroyuki Yamauchi, Worawit Somha, Yuan-Qiang Song. 121-126 [doi]
- Analysis of a serial link for power supply induced jitterJai Narayan Tripathi, Hiten Advani, Raj Kumar Nagpal, Vijender Kumar Sharma, Rakesh Malik. 127-130 [doi]
- Formal equivalence checking between SLM and RTL descriptionsJian Hu, Tun Li, Sikun Li. 131-136 [doi]
- An accelerator for classification using radial basis function neural networkMahnaz Mohammadi, Rohit Ronge, Jayesh Ramesh Chandiramani, Soumitra Kumar Nandy. 137-142 [doi]
- Reconfigurable hardware architecture of the spatial pooler for hierarchical temporal memoryAbdullah M. Zyarah, Dhireesha Kudithipudi. 143-153 [doi]
- Low-voltage 9T FinFETSRAM cell for low-power applicationsFarshad Moradi, Mohammad Tohidi. 149-153 [doi]
- Low power design for on-chip networking processing systemJie Jin, Lingling Sun, Feng Guo, Xiaojun Wang. 154-159 [doi]
- A high throughput router with a novel switch allocator for network on chipPengzhan Yan, Shixiong Jiang, Ramalingam Sridhar. 160-163 [doi]
- Fault-resilient routing unit in NoCsXiaofan Zhang, Masoumeh Ebrahimi, Letian Huang, Guangjun Li. 164-169 [doi]
- A 9-bit, 110-MS/s pipelined-SAR ADC using time-interleaved technique with shared comparatorTaehoon Kim, Sunkwon Kim, Jong-Kwan Woo, Hyongmin Lee, Suhwan Kim. 170-174 [doi]
- Design of a 12-bit 0.83 MS/s SAR ADC for an IPMI SoCHan Zhou, Xiaoyan Gui, Peng Gao. 175-179 [doi]
- Instruction decoders based on pattern factorizationRicardo Santos, Renan Marks, Rafael Alves, Felipe Araujo, Renato Santos. 180-185 [doi]
- A multi-level collaboration low-power design based on embedded systemXiang Wang, Lin Li, Longbin Zhang, Weike Wang, Rong Zhang, Yi Zhang, Quanneng Shen. 186-190 [doi]
- A deterministic, minimal routing algorithm for a toroidal, rectangular honeycomb topology using a 2-tupled relative addressAlexander Fell, S. K. Nandy, Ranjani Narayan. 191-196 [doi]
- An A-SAR ADC circuit with adaptive auxiliary comparison schemeSuresh Koyada, Abhilash Karnatakam Nagabhushana, Stefan Leitner, Haibo Wang. 197-202 [doi]
- Can systems extend to polymer? SoP architecture design and challengesUjjwal Gupta, Sankalp Jain, Ümit Y. Ogras. 203-208 [doi]
- FAcET: Fast and accurate power/energy estimation tool for CPU-GPU platforms at architectural-levelSanthosh Kumar Rethinagiri, Oscar Palomar, Javier Arias Moreno, Adrián Cristal, Osman S. Unsal. 209-214 [doi]
- Symmetric write operation for 1T-1MTJ STT-RAM cells using negative bitline techniqueHooman Farkhani, Ali Peiravi, Jens Kargaard Madsen, Farshad Moradi. 215-220 [doi]
- A PAM-4 adaptive analog equalizer with decoupling control loops for 25-Gb/s CMOS serial-link receiverShunbin Li, Peng Liu, Weidong Wang, Xing Fang, Dong Wu, Xiang-Hui Xie. 221-226 [doi]
- Low noise output stage for oversampling audio DACYujin Park, Han Yang, Hyunjong Kim, Jun Soo Cho, Suhwan Kim. 227-230 [doi]
- A digital background calibration technique for split DAC based SAR ADC by using redundant cycleWuguang Wang, Rulin Huang, Guoquan Sun, Weijun Mao, Xiaolei Zhu. 231-234 [doi]
- A 61 μA/MHz reconfigurable application-specific processor and system-on-chip for Internet-of-ThingsYuxiang Huan, Ning Ma, Stefan Blixt, Zhuo Zou, Li-Rong Zheng. 235-239 [doi]
- A point of care electrochemical impedance spectroscopy deviceZhijian Lu, Hongyi Wang, Syed Roomi Naqvi, Houqiang Fu, Yuji Zhao, Hongjiang Song, Jennifer Blain Christen. 240-244 [doi]
- Energy-efficient gas recognition system with event-driven power controlChun-Ying Huang, Po-Tsang Huang, Chih-Chao Yang, Ching-Te Chuang, Wei Hwang. 245-250 [doi]
- Loop acceleration and instruction repeat support for application specific instruction-set processorsZhenzhi Wu, Dake Liu, Xiaoyang Li. 251-256 [doi]
- Synthesis and verification of cyclic combinational circuitsJui-Hung Chen, Yung-Chih Chen, Wan-Chen Weng, Ching-Yi Huang, Chun-Yao Wang. 257-262 [doi]
- Partitioning-based multiplexer network synthesis for field-data extractorsKoki Ito, Yutaka Tamiya, Masao Yanagisawa, Nozomu Togawa. 263-268 [doi]
- A scan segmentation architecture for power controllability and reductionZhou Jiang, Dong Xiang, Kele Shen. 269-274 [doi]
- Optimization of best polarity searching for mixed polarity reed-muller logic circuitLimin Xiao, Zhenxue He, Li Ruan, Rong Zhang, Tongsheng Xia, Xiang Wang. 275-280 [doi]
- A novel flow fluidity meter for BiNoC bandwidth resource allocationWen-Chung Tsai, Hsiao-En Lin, Ying-Cherng Lan, Sao-Jie Chen, Yu Hen Hu. 281-286 [doi]
- Low-latency power-efficient adaptive router design for network-on-chipNasim Nasirian, Magdy Bayoumi. 287-291 [doi]
- A novel fault-tolerant router architecture for network-on-chip reconfigurationPengzhan Yan, Shixiong Jiang, Ramalingam Sridhar. 292-297 [doi]
- Adaptive CDMA based multicast method for photonic networks on chipSoumyajit Poddar, Prasun Ghosal, Hafizur Rahaman. 298-303 [doi]
- A 128-kb 10% power reduced 1T high density ROM with 0.56 ns access time using bitline edge sensing in sub 16nm bulk FinFET technologyVaibhav Verma, Sachin Taneja, Pritender Singh, Sanjeev Kumar Jain. 304-309 [doi]
- A 6T SRAM cell based pipelined 2R/1W memory design using 28nm UTBB-FDSOIRamandeep Kaur, Alexander Fell, Harsh Rawat. 310-315 [doi]
- Statistical analysis and parametric yield estimation of standard 6T SRAM cell for different capacitiesAnil Kumar Gundu, Mohammad S. Hashmi, Ramkesh Sharma, Naushad Ansari. 316-321 [doi]
- Memory cost analysis for OpenFlow multiple table lookupKeissy Guerra Perez, Sandra Scott-Hayward, Xin Yang, Sakir Sezer. 322-327 [doi]
- A -30 dBm sensitive ultra low power RF energy harvesting front end with an efficiency of 70.1% at -22 dBmNagaveni Vamsi, Pramod Kaddi, Ashudeb Dutta, Shiv Govind Singh. 328-332 [doi]
- VCAS: Viewing context aware power-efficient mobile video embedded memoryDongliang Chen, Xin Wang, Jinhui Wang, Na Gong. 333-338 [doi]
- Evaluation of energy-efficient latch circuits with hybrid tunneling FET and FinFET devices for ultra-low-voltage applicationsTse-Ching Wu, Chien-Ju Chen, Yin-Nien Chen, Vita Pi-Ho Hu, Pin Su, Ching-Te Chuang. 339-344 [doi]
- A high speed and low power content-addressable memory(CAM) using pipelined schemeShixiong Jiang, Pengzhan Yan, Ramalingam Sridhar. 345-349 [doi]
- The evolutionary spintronic technologies and their usage in high performance computingHai Helen Li, Xiuyuan Bi, Zhenyu Sun. 350-355 [doi]
- On microarchitectural modeling for CNFET-based circuitsTianjian Li, Hao Chen, Weikang Qian, Xiaoyao Liang, Li Jiang. 356-361 [doi]
- Timing-driven placement for carbon nanotube circuitsChen Wang, Li Jiang, Shiyan Hu, Tianjian Li, Xiaoyao Liang, Naifeng Jing, Weikang Qian. 362-367 [doi]
- Cascoded flipped voltage follower based output-capacitorless low-dropout regulator for SoCsGuangxiang Li, Jianping Guo, Yanqi Zheng, Mo Huang, Dihu Chen. 368-373 [doi]
- A fully integrated charge sharing active decap scheme for power supply noise suppressionAhmed M. Ammar, Rafik Guindi, Ethan Shih, Carlos Tokunaga, Jim Tschanz, Muhammad M. Khellah. 374-379 [doi]
- ESD protection design with stacked low-voltage devices for high-voltage pins of battery-monitoring ICChia-Tsen Dai, Ming-Dou Ker. 380-383 [doi]
- High-PSR CMOS LDO with embedded ripple feedforward and energy-efficient bandwidth extensionLiuyan Chen, Qi Cheng, Jianping Guo, Min Chen. 384-389 [doi]
- Exploiting multi-band transmission line interconnects to improve the efficiency of cache coherence in multiprocessor system-on-chipQi Hu, Kejun Wu, Peng Liu. 390-395 [doi]
- Research on crosstalk issue of through silicon via for 3D integrationTing Kang, Zhaowen Yan, Wei Zhang, Jianwei Wang. 396-400 [doi]
- Analysis and design of high performance wireless power delivery using on-chip octagonal inductor in 65-nm CMOSWeijun Mao, Liusheng Sun, Junwei Xu, Jiajia Wu, Xiaolei Zhu. 401-405 [doi]
- A novel thermal-aware structure of TSV clusterJingyan Fu, Ligang Hou, Jinhui Wang, Bo Lu, Wei Zhao, Yang Yang. 406-409 [doi]
- High-throughput MQ encoder for pass-parallel EBCOT in JPEG2000Na Bao, Zhe Jiang, Zhiheng Qi, Wei Zhang. 410-414 [doi]
- On the encoding complexity of systematic polar codesLiPing Li, Wenyi Zhang. 415-420 [doi]
- Efficient stochastic list successive cancellation decoder for polar codesXiao Liang, Chuan Zhang, Menghui Xu, Shunqing Zhang, Xiaohu You. 421-426 [doi]
- EM independent Gaussian approximate message passing and its application in OFDM impulsive noise mitigationYun Chen, YuanZhou Hu, Yizhi Wang, Xiaoyang Zeng, David Huang. 427-431 [doi]