An efficient test-data compaction for low power VLSI testing

Po-Han Wu, Tsung-Tang Chen, Wei-Lin Li, Jiann-Chyi Rau. An efficient test-data compaction for low power VLSI testing. In 2008 IEEE International Conference on Electro/Information Technology, EIT 2008, held at Iowa State University, Ames, Iowa, USA, May 18-20, 2008. pages 237-241, IEEE, 2008. [doi]

@inproceedings{WuCLR08,
  title = {An efficient test-data compaction for low power VLSI testing},
  author = {Po-Han Wu and Tsung-Tang Chen and Wei-Lin Li and Jiann-Chyi Rau},
  year = {2008},
  doi = {10.1109/EIT.2008.4554304},
  url = {http://dx.doi.org/10.1109/EIT.2008.4554304},
  tags = {testing, data-flow},
  researchr = {https://researchr.org/publication/WuCLR08},
  cites = {0},
  citedby = {0},
  pages = {237-241},
  booktitle = {2008 IEEE International Conference on Electro/Information Technology, EIT 2008, held at Iowa State University, Ames, Iowa, USA, May 18-20, 2008},
  publisher = {IEEE},
  isbn = {978-1-4244-2030-8},
}