Low Power SoC Memory BIST - researchr publication

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Yuejian Wu, André Ivanov. Low Power SoC Memory BIST. In 21th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2006), 4-6 October 2006, Arlington, Virginia, USA. pages 197-205, IEEE Computer Society, 2006. [doi]

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