Combined Use of Rising and Falling Edge Triggered Clocks for Peak Current Reduction in IP-Based SoC/NoC Designs

Tsung-Yi Wu, Tzi-Wei Kao, How-Rern Lin. Combined Use of Rising and Falling Edge Triggered Clocks for Peak Current Reduction in IP-Based SoC/NoC Designs. IEICE Transactions, 93-A(12):2581-2589, 2010. [doi]

Abstract

Abstract is missing.