Tsung-Yi Wu - researchr alias

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Viewing Publication 1 - 16 from 16

2023

A Low-Power Dual-Core Motion Estimation Chip Design and Validation for a Wireless Panoramic EndoscopyJian-Lin Zeng, Tsung-Yi Wu, Don-Gey Liu, Ching-Hwa Cheng. iscas 2023: 1-5 [doi]

Live Demonstration: A Low-Power Dual-Core Motion Estimation Chip Design and Validation for a Wireless Panoramic EndoscopyJian-Lin Zeng, Tsung-Yi Wu, Don-Gey Liu, Ching-Hwa Cheng. iscas 2023: 1 [doi]

2013

Design and Implementation of High-Speed and Energy-Efficient Variable-Latency Speculating Booth Multiplier (VLSBM)Shin-Kai Chen, Chih-Wei Liu, Tsung-Yi Wu, An-Chi Tsai. tcas, 60-I(10):2631-2643, 2013. [doi]

2012

A Preliminary Study on Using Augmented Virtuality to Improve Training for Intercollegiate ArchersTsung-Yi Wu, Yi-Chieh Chang, Shang-Ti Chen, I.-Tsun Chiang. digitel 2012: 212-216 [doi]

2010

Combined Use of Rising and Falling Edge Triggered Clocks for Peak Current Reduction in IP-Based SoC/NoC DesignsTsung-Yi Wu, Tzi-Wei Kao, How-Rern Lin. ieicet, 93-A(12):2581-2589, 2010. [doi]

Combined use of rising and falling edge triggered clocks for peak current reduction in IP-based SoC designsTsung-Yi Wu, Tzi-Wei Kao, Shi-Yi Huang, Tai-Lun Li, How-Rern Lin. aspdac 2010: 444-449 [doi]

2009

A Conditional Isolation Technique for Low-Energy and High-Performance Wide Domino GatesHow-Rern Lin, Wei-Hao Chiu, Tsung-Yi Wu. ieicet, 92-C(4):386-390, 2009. [doi]

Low-Leakage and Low-Power Implementation of High-Speed Logic GatesTsung-Yi Wu, Liang-Ying Lu. ieicet, 92-C(4):401-408, 2009. [doi]

2008

IR Drop Reduction via a Flip-Flop Resynthesis TechniqueJiun-Kuan Wu, Tsung-Yi Wu, Liang-Ying Lu, Kuang-Yao Chen. isqed 2008: 78-83 [doi]

2007

A Fast Probability-Based Algorithm for Leakage Current Reduction Considering Controller CostTsung-Yi Wu, Jr-Luen Tzeng, Kuang-Yao Chen. aspdac 2007: 672-677 [doi]

A Fast Probability-Based Algorithm for Leakage Current Reduction Considering Controller CostTsung-Yi Wu, Jr-Luen Tzeng. ieicet, 90-A(12):2718-2726, 2007. [doi]

2001

A Method of Embedded Memory Access Time MeasurementNai-Yin Sung, Tsung-Yi Wu. isqed 2001: 462 [doi]

1996

Storage optimization by replacing some flip-flops with latchesYoun-Long Lin, Tsung-Yi Wu. eurodac 1996: 296-301 [doi]

Register minimization beyond sharing among variablesTsung-Yi Wu, Youn-Long Lin. tcad, 15(12):1583-1587, 1996. [doi]

1995

Register Minimization beyond Sharing among VariablesTsung-Yi Wu, Youn-Long Lin. dac 1995: 164-169 [doi]

1994

A Synthesis Method for Mixed Synchronous / Asynchronous BehaviorTsung-Yi Wu, Tzu-Chieh Tien, Allen C.-H. Wu, Youn-Long Lin. eurodac 1994: 277-281

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