A Vernier Time-to-Digital Converter with 1.5ps Resolution for an All-Digital Phase Locked Loop in 28nm CMOS

Peifang Wu, Yan Liu, Xi Feng, Hao Xu 0005, Na Yan. A Vernier Time-to-Digital Converter with 1.5ps Resolution for an All-Digital Phase Locked Loop in 28nm CMOS. In 15th IEEE International Conference on ASIC, ASICON 2023, Nanjing, China, October 24-27, 2023. pages 1-4, IEEE, 2023. [doi]

Abstract

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