Lowering Latency of Embedded Memory by Exploiting In-Cell Victim Cache Hierarchy Based on Emerging Multi-Level Memory Devices - researchr publication authors

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Juejian Wu, Tianyu Liao, Taixin Li, Yixin Xu, Vijaykrishnan Narayanan, Yongpan Liu, Huazhong Yang, Xueqing Li. Lowering Latency of Embedded Memory by Exploiting In-Cell Victim Cache Hierarchy Based on Emerging Multi-Level Memory Devices. In IEEE/ACM International Conference on Computer Aided Design, ICCAD 2023, San Francisco, CA, USA, October 28 - Nov. 2, 2023. pages 1-9, IEEE, 2023. [doi]

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