Lowering Latency of Embedded Memory by Exploiting In-Cell Victim Cache Hierarchy Based on Emerging Multi-Level Memory Devices

Juejian Wu, Tianyu Liao, Taixin Li, Yixin Xu, Vijaykrishnan Narayanan, Yongpan Liu, Huazhong Yang, Xueqing Li. Lowering Latency of Embedded Memory by Exploiting In-Cell Victim Cache Hierarchy Based on Emerging Multi-Level Memory Devices. In IEEE/ACM International Conference on Computer Aided Design, ICCAD 2023, San Francisco, CA, USA, October 28 - Nov. 2, 2023. pages 1-9, IEEE, 2023. [doi]

@inproceedings{WuLLXNLYL23,
  title = {Lowering Latency of Embedded Memory by Exploiting In-Cell Victim Cache Hierarchy Based on Emerging Multi-Level Memory Devices},
  author = {Juejian Wu and Tianyu Liao and Taixin Li and Yixin Xu and Vijaykrishnan Narayanan and Yongpan Liu and Huazhong Yang and Xueqing Li},
  year = {2023},
  doi = {10.1109/ICCAD57390.2023.10323756},
  url = {https://doi.org/10.1109/ICCAD57390.2023.10323756},
  researchr = {https://researchr.org/publication/WuLLXNLYL23},
  cites = {0},
  citedby = {0},
  pages = {1-9},
  booktitle = {IEEE/ACM International Conference on Computer Aided Design, ICCAD 2023, San Francisco, CA, USA, October 28 - Nov. 2, 2023},
  publisher = {IEEE},
  isbn = {979-8-3503-2225-5},
}