P. B. Wu, R. J. Mack, R. E. Massara. A parameterised block-level layout generation system for CMOS analog ICs. In IEEE International Symposium on Circuits and Systems, ISCAS 2000, Emerging Technologies for the 21st Century, Geneva, Switzerland, 28-31 May 2000, Proceedings. pages 197-200, IEEE, 2000. [doi]
Abstract is missing.