Enhanced temporal error concealment algorithm with edge-sensitive processing order

Tung-Hsing Wu, Guan-Lin Wu, Ching-Yi Chen, Shao-Yi Chien. Enhanced temporal error concealment algorithm with edge-sensitive processing order. In International Symposium on Circuits and Systems (ISCAS 2008), 18-21 May 2008, Sheraton Seattle Hotel, Seattle, Washington, USA. pages 3466-3469, IEEE, 2008. [doi]

Authors

Tung-Hsing Wu

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Guan-Lin Wu

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Ching-Yi Chen

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Shao-Yi Chien

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