Tung-Hsing Wu, Guan-Lin Wu, Ching-Yi Chen, Shao-Yi Chien. Enhanced temporal error concealment algorithm with edge-sensitive processing order. In International Symposium on Circuits and Systems (ISCAS 2008), 18-21 May 2008, Sheraton Seattle Hotel, Seattle, Washington, USA. pages 3466-3469, IEEE, 2008. [doi]
@inproceedings{WuWCC08,
title = {Enhanced temporal error concealment algorithm with edge-sensitive processing order},
author = {Tung-Hsing Wu and Guan-Lin Wu and Ching-Yi Chen and Shao-Yi Chien},
year = {2008},
doi = {10.1109/ISCAS.2008.4542205},
url = {http://dx.doi.org/10.1109/ISCAS.2008.4542205},
researchr = {https://researchr.org/publication/WuWCC08},
cites = {0},
citedby = {0},
pages = {3466-3469},
booktitle = {International Symposium on Circuits and Systems (ISCAS 2008), 18-21 May 2008, Sheraton Seattle Hotel, Seattle, Washington, USA},
publisher = {IEEE},
}