Tung-Hsing Wu, Guan-Lin Wu, Ching-Yi Chen, Shao-Yi Chien. Enhanced temporal error concealment algorithm with edge-sensitive processing order. In International Symposium on Circuits and Systems (ISCAS 2008), 18-21 May 2008, Sheraton Seattle Hotel, Seattle, Washington, USA. pages 3466-3469, IEEE, 2008. [doi]
Abstract is missing.