Shianling Wu, Laung-Terng Wang, Zhigang Jiang, Jiayong Song, Boryau Sheu, Xiaoqing Wen, Michael Hsiao, James Chien-Mo Li, Jiun-Lang Huang, Ravi Apte. On Optimizing Fault Coverage, Pattern Count, and ATPG Run Time Using a Hybrid Single-Capture Scheme for Testing Scan Designs. In Cristiana Bolchini, Yong-Bin Kim, Dimitris Gizopoulos, Mohammad Tehranipoor, editors, 23rd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2008), 1-3 October 2008, Boston, MA, USA. pages 143-151, IEEE Computer Society, 2008. [doi]
@inproceedings{WuWJSSWHJLHA08,
title = {On Optimizing Fault Coverage, Pattern Count, and ATPG Run Time Using a Hybrid Single-Capture Scheme for Testing Scan Designs},
author = {Shianling Wu and Laung-Terng Wang and Zhigang Jiang and Jiayong Song and Boryau Sheu and Xiaoqing Wen and Michael Hsiao and James Chien-Mo Li and Jiun-Lang Huang and Ravi Apte},
year = {2008},
doi = {10.1109/DFT.2008.29},
url = {http://dx.doi.org/10.1109/DFT.2008.29},
tags = {optimization, test coverage, testing, coverage},
researchr = {https://researchr.org/publication/WuWJSSWHJLHA08},
cites = {0},
citedby = {0},
pages = {143-151},
booktitle = {23rd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2008), 1-3 October 2008, Boston, MA, USA},
editor = {Cristiana Bolchini and Yong-Bin Kim and Dimitris Gizopoulos and Mohammad Tehranipoor},
publisher = {IEEE Computer Society},
}