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A 0.6V 8b 100MS/s SAR ADC with minimized DAC capacitance and switching energy in 65nm CMOS

Wen-Lan Wu, Yan Zhu, Li Ding, Chi-Hang Chan, U. Fat Chio, Sai-Weng Sin, Seng-Pan U., Rui Paulo Martins. A 0.6V 8b 100MS/s SAR ADC with minimized DAC capacitance and switching energy in 65nm CMOS. In 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), Beijing, China, May 19-23, 2013. pages 2239-2242, IEEE, 2013. [doi]

Authors

Wen-Lan Wu

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Yan Zhu

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Li Ding

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Chi-Hang Chan

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U. Fat Chio

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Sai-Weng Sin

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Seng-Pan U.

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Rui Paulo Martins

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