A 65nm embedded low power SRAM compiler

Sheng Wu, Xiang Zheng, Zhiqiang Gao, Xiangqing He. A 65nm embedded low power SRAM compiler. In Elena Gramatová, Zdenek Kotásek, Andreas Steininger, Heinrich Theodor Vierhaus, Horst Zimmermann, editors, 13th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2010, Vienna, Austria, April 14-16, 2010. pages 123-124, IEEE, 2010. [doi]

Abstract

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