Architectural Exploration Using Verilog-Based Power Estimation: A Case Study of the IDCT

Thucydides Xanthopoulos, Yoshifumi Yaoi, Anantha Chandrakasan. Architectural Exploration Using Verilog-Based Power Estimation: A Case Study of the IDCT. In DAC. pages 415-420, 1997. [doi]

@inproceedings{XanthopoulosYC97,
  title = {Architectural Exploration Using Verilog-Based Power Estimation: A Case Study of the IDCT},
  author = {Thucydides Xanthopoulos and Yoshifumi Yaoi and Anantha Chandrakasan},
  year = {1997},
  doi = {10.1145/266021.266184},
  url = {http://doi.acm.org/10.1145/266021.266184},
  tags = {rule-based, case study, architecture},
  researchr = {https://researchr.org/publication/XanthopoulosYC97},
  cites = {0},
  citedby = {0},
  pages = {415-420},
  booktitle = {DAC},
}